linux VHDL : to_bitvector + compiling problem

[Nikiforakis Manos]

...pali edw. Pou 8a mou paei 8a to kanw na doulepsei!

File Stefane me boh8hsan auta pou mou eipes kai h "egkatastash" tou
std_logic_1164.vhdl oloklhrw8hke mia xara.

Kanw publish to test.vhdl tou Simulation Manual tou Savand mia xara, xwris
problhmata, dhmiourgountai ola ta anamenomena kai paw pleon na kanw compile
ta c
 files mesa sto /home/manos/VHDL/worl._savand_lib/ dinontas #make depend;
make
Edw parousiazetai kai to problhma. Enw arxizei kala, kapoia stigmh mou
bgazei t
a ekshs mynhmata la8ous:

myproccesswork_Dmyentity_Dbehavioral.cc:26: iplicit declaration of function
'int ieee_Dstd_logic_1164_SavantAndstd_logic_vectorstd_logic_vector(...)'
myproccesswork_Dmyentity_Dbehavioral.cc:26: warning: cannot pass objects of
type 'Savantieee_Dstd_logic_1164_Dstd_logic_vectorType' through '...'

myproccesswork_Dmyentity_Dbehavioral.cc:50: iplicit declaration of function
'int ieee_Dstd_logic_1164_SavantAndstd_logic_vectorstd_logic_vector(...)'
myproccesswork_Dmyentity_Dbehavioral.cc:50: warning: cannot pass objects of
type 'Savantieee_Dstd_logic_1164_Dstd_logic_vectorType' through '...'

myproccesswork_Dmyentity_Dbehavioral.cc:74: iplicit declaration of function
'int ieee_Dstd_logic_1164_SavantAndstd_logic_vectorstd_logic_vector(...)'
myproccesswork_Dmyentity_Dbehavioral.cc:74: warning: cannot pass objects of
type 'Savantieee_Dstd_logic_1164_Dstd_logic_vectorType' through '...'

Meta apo ligo psaximo, eida pws ta sfalmata auta exoun sxesh me thn entolh
to_bitvector h opoia xrhsimopoieitai 3 fores sto programma (test.vhdl) stis
grammes 31, 33, 35.

Kammia idea?

Mou eipes an de kanw la8os, pws xrhsimopoieis to Ver(ilog) etsi? Poia
biblio8hkh ths GTK xreiazetai gia na egkatasta8ei? Kai yparxei kapoio arxeio
me
 odhgies egkatastaseis -giati den brhka pou8ena kati tetoio. ?

Eyxaristw.





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