soundcard

gnux ypatia at otenet.gr
Tue Aug 29 01:45:46 EEST 2000


Γειά σε όλους
Έχω μία κάρτα ήχου, την CREATIVE SOUNBLASTER VIBRA C16F (16 bit-ISA PnP)
και προσπαθώ εδώ και καιρό να την δει ο πυρήνας 2.2.14 (SuSE Linux 6.4).
Δεν την βλέπει το Yast2 (ALSA) και επίσης όχι πλήρως το OSS/free το οποίο
τη βλέπει σαν CREATIVE SOUNBLASTER 16 PnP (Type-8). Τρομερά απογοητευθείς (sic)
δοκίμασα και το pnpdump με το παρακάτω αποτέλεσμα στο /etc/isapnp.conf.
Πως σας φαίνεται; Καλό εεεε;....
Παρακαλώ τη βοήθειά σας :(





# $Id: pnpdump.c,v 1.21 1999/12/09 22:28:33 fox Exp $
# Release isapnptools-1.21 (library isapnptools-1.21)
# 
# This is free software, see the sources for details.
# This software has NO WARRANTY, use at your OWN RISK
# 
# For details of the output file format, see isapnp.conf(5)
# 
# For latest information and FAQ on isapnp and pnpdump see:
# http://www.roestock.demon.co.uk/isapnptools/
# 
# Compiler flags:  -DREALTIME -DNEEDSETSCHEDULER -DABORT_ONRESERR
# (for   library:  -DREALTIME -DNEEDSETSCHEDULER -DABORT_ONRESERR)
# 
# Trying port address 0273
# Board 1 has serial identifier 73 10 14 15 0c 2a 00 8c 0e

# (DEBUG)
(READPORT 0x0273)
(ISOLATE PRESERVE)
(IDENTIFY *)
(VERBOSITY 2)
(CONFLICT (IO FATAL)(IRQ FATAL)(DMA FATAL)(MEM FATAL)) # or WARNING

# Card 1: (serial identifier 73 10 14 15 0c 2a 00 8c 0e)
# Vendor Id CTL002a, Serial Number 269751564, checksum 0x73.
# Version 1.0, Vendor version 1.0
# ANSI string -->Creative SB16 PnP<--
#
# Logical device id CTL0031
#     Device supports vendor reserved register @ 0x38
#     Device supports vendor reserved register @ 0x3c
#     Device supports vendor reserved register @ 0x3e
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed if required
# Don't forget to uncomment the activate (ACT Y) when happy

(CONFIGURE CTL002a/269751564 (LD 0
#     ANSI string -->Audio<--

# Multiple choice time, choose one only !

#     Start dependent functions: priority preferred
#       IRQ 5.
#             High true, edge sensitive interrupt (by default)
  (INT 0 (IRQ 5 (MODE +E)))
#       First DMA channel 1.
#             8 bit DMA only
#             Logical device is a bus master
#             DMA may execute in count by byte mode
#             DMA may not execute in count by word mode
#             DMA channel speed in compatible mode
  (DMA 0 (CHANNEL 1))
#       Next DMA channel 5.
#             16 bit DMA only
#             Logical device is a bus master
#             DMA may not execute in count by byte mode
#             DMA may execute in count by word mode
#             DMA channel speed in compatible mode
  (DMA 1 (CHANNEL 5))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0220
#             Maximum IO base address 0x0220
#             IO base alignment 1 bytes
#             Number of IO addresses required: 16
  (IO 0 (SIZE 16) (BASE 0x0220))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0330
#             Maximum IO base address 0x0330
#             IO base alignment 1 bytes
#             Number of IO addresses required: 2
  (IO 1 (SIZE 2) (BASE 0x0330))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0388
#             Maximum IO base address 0x0388
#             IO base alignment 1 bytes
#             Number of IO addresses required: 4
  (IO 2 (SIZE 4) (BASE 0x0388))

#       Start dependent functions: priority acceptable
#       IRQ 5, 7 or 10.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
#       First DMA channel 0, 1 or 3.
#             8 bit DMA only
#             Logical device is a bus master
#             DMA may execute in count by byte mode
#             DMA may not execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
#       Next DMA channel 5, 6 or 7.
#             16 bit DMA only
#             Logical device is a bus master
#             DMA may not execute in count by byte mode
#             DMA may execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0220
#             Maximum IO base address 0x0280
#             IO base alignment 32 bytes
#             Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0300
#             Maximum IO base address 0x0330
#             IO base alignment 48 bytes
#             Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0300))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0388
#             Maximum IO base address 0x0388
#             IO base alignment 1 bytes
#             Number of IO addresses required: 4
# (IO 2 (SIZE 4) (BASE 0x0388))

#       Start dependent functions: priority acceptable
#       IRQ 5, 7 or 10.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
#       First DMA channel 0, 1 or 3.
#             8 bit DMA only
#             Logical device is a bus master
#             DMA may execute in count by byte mode
#             DMA may not execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
#       Next DMA channel 5, 6 or 7.
#             16 bit DMA only
#             Logical device is a bus master
#             DMA may not execute in count by byte mode
#             DMA may execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0220
#             Maximum IO base address 0x0280
#             IO base alignment 32 bytes
#             Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0300
#             Maximum IO base address 0x0330
#             IO base alignment 48 bytes
#             Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0300))

#       Start dependent functions: priority functional
#       IRQ 5, 7 or 10.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
#       First DMA channel 0, 1 or 3.
#             8 bit DMA only
#             Logical device is a bus master
#             DMA may execute in count by byte mode
#             DMA may not execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
#       Next DMA channel 5, 6 or 7.
#             16 bit DMA only
#             Logical device is a bus master
#             DMA may not execute in count by byte mode
#             DMA may execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0220
#             Maximum IO base address 0x0280
#             IO base alignment 32 bytes
#             Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))

#       Start dependent functions: priority functional
#       IRQ 5, 7 or 10.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
#       First DMA channel 0, 1 or 3.
#             8 bit DMA only
#             Logical device is a bus master
#             DMA may execute in count by byte mode
#             DMA may not execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0220
#             Maximum IO base address 0x0280
#             IO base alignment 32 bytes
#             Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0300
#             Maximum IO base address 0x0330
#             IO base alignment 48 bytes
#             Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0300))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0388
#             Maximum IO base address 0x0388
#             IO base alignment 1 bytes
#             Number of IO addresses required: 4
# (IO 2 (SIZE 4) (BASE 0x0388))

#       Start dependent functions: priority functional
#       IRQ 5, 7 or 10.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
#       First DMA channel 0, 1 or 3.
#             8 bit DMA only
#             Logical device is a bus master
#             DMA may execute in count by byte mode
#             DMA may not execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0220
#             Maximum IO base address 0x0280
#             IO base alignment 32 bytes
#             Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0300
#             Maximum IO base address 0x0330
#             IO base alignment 48 bytes
#             Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0300))

#       Start dependent functions: priority functional
#       IRQ 5, 7, 10 or 11.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
#       First DMA channel 0, 1 or 3.
#             8 bit DMA only
#             Logical device is a bus master
#             DMA may execute in count by byte mode
#             DMA may not execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0220
#             Maximum IO base address 0x0280
#             IO base alignment 32 bytes
#             Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))

#     End dependent functions
 (NAME "CTL002a/269751564[0]{Audio               }")
  (ACT Y)
))
#
# Logical device id CTL2011
#     Device supports vendor reserved register @ 0x38
#     Device supports vendor reserved register @ 0x3c
#     Device supports vendor reserved register @ 0x3e
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed if required
# Don't forget to uncomment the activate (ACT Y) when happy

(CONFIGURE CTL002a/269751564 (LD 1
#     Compatible device id PNP0600
#     ANSI string -->IDE<--

# Multiple choice time, choose one only !

#     Start dependent functions: priority preferred
#       IRQ 10.
#             High true, edge sensitive interrupt (by default)
  (INT 0 (IRQ 10 (MODE +E)))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0168
#             Maximum IO base address 0x0168
#             IO base alignment 1 bytes
#             Number of IO addresses required: 8
  (IO 0 (SIZE 8) (BASE 0x0168))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x036e
#             Maximum IO base address 0x036e
#             IO base alignment 1 bytes
#             Number of IO addresses required: 2
  (IO 1 (SIZE 2) (BASE 0x036e))

#       Start dependent functions: priority acceptable
#       IRQ 11.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 11 (MODE +E)))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x01e8
#             Maximum IO base address 0x01e8
#             IO base alignment 1 bytes
#             Number of IO addresses required: 8
# (IO 0 (SIZE 8) (BASE 0x01e8))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x03ee
#             Maximum IO base address 0x03ee
#             IO base alignment 1 bytes
#             Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x03ee))

#       Start dependent functions: priority acceptable
#       IRQ 10, 11 or 15.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 10 (MODE +E)))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0100
#             Maximum IO base address 0x01f8
#             IO base alignment 8 bytes
#             Number of IO addresses required: 8
# (IO 0 (SIZE 8) (BASE 0x0100))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0300
#             Maximum IO base address 0x03fe
#             IO base alignment 2 bytes
#             Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0300))

#       Start dependent functions: priority functional
#       IRQ 15.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 15 (MODE +E)))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0170
#             Maximum IO base address 0x0170
#             IO base alignment 1 bytes
#             Number of IO addresses required: 8
# (IO 0 (SIZE 8) (BASE 0x0170))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0376
#             Maximum IO base address 0x0376
#             IO base alignment 1 bytes
#             Number of IO addresses required: 1
# (IO 1 (SIZE 1) (BASE 0x0376))

#     End dependent functions
 (NAME "CTL002a/269751564[1]{IDE                 }")
  (ACT Y)
))
#
# Logical device id PNPffff
#     Device supports vendor reserved register @ 0x38
#     Device supports vendor reserved register @ 0x39
#     Device supports vendor reserved register @ 0x3c
#     Device supports vendor reserved register @ 0x3e
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed if required
# Don't forget to uncomment the activate (ACT Y) when happy

(CONFIGURE CTL002a/269751564 (LD 2
#     ANSI string -->Reserved<--
#     Logical device decodes 16 bit IO address lines
#         Minimum IO base address 0x0100
#         Maximum IO base address 0x03f8
#         IO base alignment 8 bytes
#         Number of IO addresses required: 1
  (IO 0 (SIZE 1) (BASE 0x0100))
 (NAME "CTL002a/269751564[2]{Reserved            }")
  (ACT Y)
))
#
# Logical device id CTL7001
#     Device supports vendor reserved register @ 0x38
#     Device supports vendor reserved register @ 0x39
#     Device supports vendor reserved register @ 0x3c
#     Device supports vendor reserved register @ 0x3e
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed if required
# Don't forget to uncomment the activate (ACT Y) when happy

(CONFIGURE CTL002a/269751564 (LD 3
#     Compatible device id PNPb02f
#     ANSI string -->Game<--
#     Logical device decodes 16 bit IO address lines
#         Minimum IO base address 0x0200
#         Maximum IO base address 0x0200
#         IO base alignment 1 bytes
#         Number of IO addresses required: 8
  (IO 0 (SIZE 8) (BASE 0x0200))
 (NAME "CTL002a/269751564[3]{Game                }")
  (ACT Y)
))
# End tag... Checksum 0x00 (OK)

# Returns all cards to the "Wait for Key" state
(WAITFORKEY)

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