Peri hardware (was Re: Hi)
Tasos Bassoukos
abas at aix.meng.auth.gr
Sun Feb 8 16:53:43 EET 1998
Alexios Chouchoulas wrote:
>
[snip kati gia 68000]
> Ti ennoeis *PALIOS* kalos 68000? Afth th stigmh exw s'afto to dwmatio enan
> 68000 (nai, to megalo platy xthnos sto DIL64 paketo) mesa s'ena X Terminal
> kai dyo (syntoma treis) 68020 (enan/dyo sta 16.67 MHz, enan sta 25). Malista
> sthn defterh periptwsh (Sun 3/160 me mpolikes kartes CPU gia antallaktika),
> yparxei ston SCSI controller (3rd party) enas Intel 80186 ws I/O CPU. Etsi
> prepei, h swsth ierarxia. :-)
[gourgourizontas] wwwww..... zhlepsa. :)
Sobara twra, pisteyw oti oi 680x0 einai pio eykoloi sto na metaferoun
kommatia mnhmhs... Ypologisa oti o 68000 mporei na ftasei ta 800Kb/sec
bulk metafora dedomenwn (sta 16 Mhz nomizw...)(paliotera, otan me
apasxolouse to 8ema...). Se 16-bit bus. Me 4 clock-cycles/word transfer.
Xwris cache.
Kai ennoousa oti o 68000 yphrxe apo to 1984 (sxedon..), pou gia mena
einai ..... oym.... olokaino :) [5]
[snip kommati gia ta Bus errors]
> ................................ Tha mporouses dynhtika na
> xrhsimopoihseis ena apo ta dyo (!) interrupt lines tou epeksergasth (h mhpws
Dyo ???? DYO ????? twra katalabainw (nomizw) giati yparxei problhma me
to interrupt handling sta ix86 ...
> exei panw apo IRQ kai NMI twra?) gia na prokaleseis device exceptions (oxi
> device interrupts -- px NMI gia exceptions, IRQ gia interrupts). Alla sthn
> arxitektonikh twn IBM 5150 kai symbatwn, afto den exei ylopoiithei (na
> xairomaste pou eixan ylopoiithei kai ta 8 multiplexed interrupts pou eixe to
> 5150, kai 16 pou exoume emeis oi foberoi sygxronoi PCades).
Tsk tsk tsk... As mhn synexisw edw gia ton 680x0, giati 8a arxisoun na
mou petane petres..
[snip]
> > > [1] Ta PDP-11 kai oi apogonoi tous kanoun memory-mapped I/O.
> >
> > Opws ola ta swsta systhmata :)
>
> E, afto paizetai. Opws to 50% twn systhmatwn. :-) Metaksy mas, ektimw thn
> dynatothta na exei kaneis aneksarthto I/O. Krataei th mnhmh gia pio swsta
> pragmata (opws mnhmh), alla einai kai poly pio periploko na xtiseis buses
> gia tetoies arxitektonikes. Apo thn allh, armozei pio poly se unixokouta to
> MM I/O, giati dinei ena hardware abstraction se epipedo hardwarei (oles oi
> syskeves leitourgoun me ena aplo tropo, me I/O sth mnhmh -- aplopoioume kai
> to instruction set). Den einai tyxaio pou oloi oi RISC kanoun MM I/O.
Um.. oi risc kanoun MM I/O giati den h8elan (oi sxediastes) na baloun
mia epipleon entolh eidika gia to I/O. Otan exeis merikes fores mono 32
h (GASP!) 16 diaforetikes entoles.... Kai hdh, otan arxizeis na ftaneis
sto 1GB pragmatikh mnhmh se 32-bit address bus, prepei na skeftesai thn
epektash...[3][4]
[snip kommati gia GPF]
> Toulaxiston yparxei ENA elpidoforo pragma gia tis arxitektonikes ths
> Intel. Twra pou agorase ton Alpha apo thn (makaritisa se ligo) Digital, h
> epomenh platforma ths Intel mporei na einai safws kalyterh ap'oti exei
> paragei monh ths edw kai, xm, 23 xronia.
Exw stamathsei na elpizw[2] se 8aymata apo hm... 4wn xronwn ;-)
>
> A.
>
> -------------------------- ,o88,o888o,,o888o. --------------------------------
> Alexios Chouchoulas '88 ,88' ,88' http://www.vennea.demon.co.uk
> The Unpronounceable One ,o88oooo88ooooo88oo, alexios at vennea.demon.co.uk
>
[1] MFN, BOOM (My footnote, but on older mail)
[2] nai, elpizw. oxi pisteyw. ayto einai allo 8ema :)
[3] alh8eia, posa bits exei to address bus tou pentium/PPro/PII ?
[4] DEN 8elw na skeftw ti 8a kanei h intel gia na ftasei ta 64 bits ...
(me to instruction set kai tous kataxwrhtes...)[6]
[5] ypoti8etai oti eimai gewlogos (foithths)
[6] ektos ean exei ftasei hdh, opote egw prepei na ma8w to ma8hma mou :)
[7] Ayto to footnote perissepse meta to Garbage Collection :)
--
Bassoukos Tassos +30 31 996011
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